This page describes fields of research in which staff of the Institute of Embedded Systems regularly offers topics for Bachelor's or Master's theses as well as for Research Projects. All these research fields are very broad, concrete topics for a thesis or project will be shaped depending on a student's interests and needs.

In order to apply, please send an e-mail to es-theses@tuhh.de from your TUHH mail account. This e-mail includes the following information:

• The research field you are interested in.
• Whether you apply for a Bachelor's Thesis, master-level Research Project, or Master's Thesis, including your study programme.
• Clear statements in how far you bring skills that satisfy the prerequisites mentioned below for the research field of your interest.
• An up to date copy of your Transcript of Records.

Very good compilers are required to generate highly efficient assembly code for embedded systems being subject to stringent design constraints. Compiler optimizations can significantly improve real-timeliness, energy efficiency or code size of embedded software. We investigate techniques to analyze and optimize embedded software within the institute's in-house compiler for the aforementioned properties. Previous theses considered, e.g., adding support for novel embedded processor architectures, or designing novel timing analysis infrastructure. Techniques used here include, e.g., static code analysis, integer-linear programming or evolutionary algorithms.

Thesis/Project topics in this field will be offered and supervised by the Embedded Systems Design Group (Prof. Falk).

Prerequisites:

• Essential: Very good programming and software engineering skills, C++, interest in low-level assembly programming.
• Depending on the specific topic: Knowledge in compiler techniques, optimization.

Connected digital systems interacting with the physical world, i.e., Cyber-Physical Systems (CPSs) are all around. Compact understandable models of CPS are often missing. We investigate how to learn and qualify models that often do not exist and to use these models for testing and diagnostics. Previous theses considered, e.g., machine learning to create understandable models for digital circuits and conveyor belt control systems or detecting anomalous behaviour in control systems of a particle accelerator. Techniques used here include machine learning, syntax guided synthesis, or formal methods.

Thesis/Project topics in this field will be offered and supervised by the Computer Engineering Group (Prof. Fey).

Prerequisites:

• Essential: Very good programming and software engineering skills, basic knowledge in control theory.
• Depending on the specific topic: Knowledge in machine learning techniques, automata theory, complexity theory, Matlab.

Embedded systems such as those for autonomous driving are subject to stringent requirements in terms of energy and computing efficiency. One way to meet these requirements is to use heterogeneous systems that not only consist of CPU cores, but also include hardware accelerators. We develop and optimize heterogeneous systems and investigate them with regard to their energy and computing time requirements. We also develop and optimize design tools for these types of systems. For example, a library for the NIM language has been developed which makes it possible to generate FPGA-based hardware accelerators from algorithms formulated in NIM. Future work will extend this library and enable heterogeneous systems to be designed entirely in NIM. This includes the design of the application-specific FPGA-based hardware accelerator, the automatic interfacing between accelerator and CPU core, as well as the software side of the CPU cores and the connected hardware accelerators.

Thesis/Project topics in this field will be offered and supervised by the Embedded Systems Design Group (Dipl.-Ing. Brandt).

Prerequisites:

• Essential: Very good knowledge in computer architecture, hardware design and FPGAs.
• Depending on the specific topic: Knowledge of compiler construction.

The first open Instruction Set Architecture (ISA) RISC-V has taken both large and many smaller chip design departments by storm. Not least because of its extensibility and scalability and the existing ecosystem around the ISA with various compilers, simulators and verification tools.

The Institute of Embedded Systems has developed a configurable RISC-V CPU core and aims to extend it. It is not described in the classical hardware description languages Verilog or VHDL, but using a small but powerful hardware generation language embedded in Python, called PyRTL. Future extensions can focus on formal properties and constraints defined within a PyRTL circuit design, or on the connection to an open-source tool for formal verification that automatically verifies the RISC-V design.

Thesis/Project topics in this field will be offered and supervised by the Embedded Systems Design Group (Dipl.-Ing. Brandt).

Prerequisites:

• Essential: Very good knowledge in computer architecture, good programming skills in Python.
• Depending on the specific topic: Knowledge in Verilog, formal verification.

Digital circuits – usually described at the Register Transfer Level in, e.g., Verilog, or at higher abstraction levels in, e.g., SystemC – are complex systems themselves. Understanding a given digital system, ensuring correctness at design time, and testing whether a produced chip works properly are difficult.

We investigate software tools and algorithms that support these tasks. Previous theses researched, e.g., 3D-visualization in a game engine for improved understanding or automatically extracting the flow of information in a digital system. The research builds on powerful paradigms like Satisfiability modulo Theories (SMT), fast simulation algorithms, and open source frameworks for circuit design.

Thesis/Project topics in this field will be offered and supervised by the Computer Engineering Group (Prof. Fey).

Prerequisites:

• Essential: Very good programming and software engineering skills, C++, basic knowledge in circuit design, automata theory.
• Depending on the specific topic: Experience with Verilog or VHDL, basic knowledge of formal verification techniques.

The Institute of Embedded Systems co-supervises theses or research projects with other Computer Science institutes. Goal of such interdisciplinary activities is to combine the expertise among the various institutes. We thus have a strong interest in compiler techniques for secure embedded software, or in radically novel optimization paradigms exploiting Quantum-inspired principles. Techniques of interest here could include, e.g., vulnerability analysis, side channel mitigation, or Fujitsu's Digital Annealer.

Thesis/Project topics in this field will jointly be offered and supervised by the Embedded Systems Design Group (Prof. Falk) and, e.g., the Institute of Software Security (Prof. Scandariato) or the Institute for Quantum Inspired and Quantum Optimization (Prof. Kliesch).

Prerequisites:

• Essential: Very good programming and software engineering skills, high interest in interdisciplinary work, good communication soft skills.
• Depending on the specific topic: Knowledge in compiler techniques, software security, optimization, complexity theory.