Institute for Reliable Computing
Head:
Prof. Dr. Siegfried M. Rump
PUBLICATIONS - THOMAS TEUFEL
- M. Baesler, S. Voigt, and T. Teufel. FPGA Implementations of Radix-10 Digit Recurrence Fixed-Point and Floating-Point Dividers. International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2011:13–19, 2011. (doi:10.1109/ReConFig.2011.41)
- M. Baesler, S. Voigt, and T. Teufel. A Decimal Floating-Point Accurate Scalar Product Unit with a Parallel Fixed-Point Multiplier on a Virtex-5 FPGA. International Journal of Reconfigurable Computing, 2010. (doi:10.1155/2010/357839)
- M. Baesler, S. Voigt, and T. Teufel. A Radix-10 Digit Recurrence Division Unit with a Constant Digit Selection Function. 28th IEEE International Conference on Computer Design (ICCD), pages 241–246, 2010. (doi:10.1109/ICCD.2010.5647764)
- M. Baesler, S. Voigt, and T. Teufel. An IEEE 754-2008 Decimal Parallel and Pipelined FPGA Floating-Point Multiplier. Proceedings of the 20th International Conference on Field Programmable Logic and Applications (FPL '10), pages 489–495, 2010. (doi:10.1109/FPL.2010.98)
- S. Voigt, M. Baesler, and T. Teufel. Dynamically reconfigurable dataflow architecture for high-performance digital signal processing. Journal of Systems Architecture, 56(11):561–576, 2010. Design Flows and System Architectures for Adaptive Computing on Reconfigurable Platforms. (doi:10.1016/j.sysarc.2010.07.010)
- M. Baesler and T. Teufel. FPGA Implementation of a Decimal Floating-Point Accurate Scalar Product Unit with a Parallel Fixed-Point Multiplier. International Conference on ReConFigurable Computing and FPGAs, Cancun, Mexico, 2009. (doi:10.1109/ReConFig.2009.17)
- S. Voigt and T. Teufel. Analysis of a Dynamically Reconfigurable Dataflow Architecture and its Scalable Parallel Extension for Multi-FPGA Platforms. In Proceedings of the Sixteenth IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM '08, Stanford University, CA, 2008.
- S. Voigt and T. Teufel. Dynamically Reconfigurable Dataflow Architecture for High-Performance Digital Signal Processing on Multi-FPGA Platforms. In Proceedings of the IEEE Int. Conference on Field Programmable Logic and Applications (FPL2007), pages 633–637, 2007. (doi:10.1109/FPL.2007.4380734)
- R. Rasenack and T. Teufel. Entwurf und Implementierung einer gesicherten nachrichtenbasierten Kommunikation für verteilte Anwendungen. atp, 48(10):54–62, 2006. (hdl.handle.net/11420/8865)
- T. Teufel. Neue Telematik-Dienste im ÖPNV-Bus. In IAA-Nutzfahrzeuge, 2002. (hdl.handle.net/11420/9423)
- U. Behncke and T. Teufel. Fuzzy-Logik in der Klimatechnik. atp, 42(1), 2000.
- T. Teufel. Modulare integrierter Bordrechner mit neuen Telematik-Diensten für den ÖPNV. In Inno Trans 2002, 2000. (hdl.handle.net/11420/9432)
- T. Teufel. Neuer Fahrerarbeitsplatz im ÖPHV-Bus. In International Union of Public Transport UIIP, Juni 1997.
- T. Teufel and S. Kwee. Pipeline Optimization for 32bit Floating Point Units. In Proceedings of ICSPAT '97, San Diego, USA, Sept. 1997. (hdl.handle.net/11420/9395)
- T. Teufel. A Novel VLSI Vector Arithmetic Coprocessor for Advanced DSP Applications. In Proceedings of ICSPAT '96, volume 2, pages 1894–1898, Boston, USA, October 1996. (hdl.handle.net/11420/9462)
- T. Teufel and A. Pierick. Codierung von Daten für die sichere Mobilfunkübertragung. Signal + Draht, 1996(Mai), 1996. (hdl.handle.net/11420/9461)
- T. Teufel. Genauer und trotzdem schneller - Ein neuer Coprozessor für hochgenaue Matrix- und Vektoroperationen. Elektronik, Heft 26, 1994. (hdl.handle.net/11420/9476)