Institute of Embedded Systems

Note: dziener, ESD

Abstract: In this paper, we present a novel architecture for high throughput database query processing. This architecture is based on an intelligent hardware/software co-design and consists of a highly configurable FPGA-based filter chain with arithmetic operation support and an alignment unit. It feeds the filtered data directly and in a cache-optimized way to an embedded processor which are responsible for joining tables and post processing. High throughput interfaces and parallelism of FPGAs are thus combined in order to provide reduced and cache-aligned data for optimized processor access. As a key component, we introduce a new highly configurable bloom filter cascade to relieve a processor of time-consuming hash-value computation and to significantly reduce the data for hash joins. It is shown that this unique approach may reduce the amount of data to be processed by the processors in typical data-warehouse applications by several orders of magnitude. The proposed architecture has been implemented on the embedded low-energy system-on-chip (SoC) platform Xilinx Zynq. Performance results for standard benchmarks show an up to 10~x higher throughput compared to a full featured x86-based processor at only a fraction of energy consumption.