Institute of Embedded Systems

Note: hfalk, ESD, emp2, WCC

Abstract: Timing constraints must be respected for embedded real-time applications. Traditionally, compilers are unable to use precise estimates of execution times for optimization, and timing properties of code are derived after compilation. A number of design iterations are required if timing constraints are not met. We propose to reconcile compilers and timing analysis and to create a worst-case execution time (WCET) aware compiler in this way. Such WCET-aware compilers can exploit precise WCET information during compilation. This way, they are able to improve the code quality. Also, we may be able to avoid some of the design iterations.<br /> In this chapter, we describe the integration of a compiler and a WCET analyzer, yielding our WCET-aware compiler WCC. We are then reconsidering standard compiler optimizations for their potential to reduce the WCET, assuming that the WCET is now used as the cost function. Considered optimizations include function inlining, loop unrolling, loop unswitching, register allocation, scratchpad memory allocation, and cache partitioning. For a set of benchmarks, average WCET reductions of up to 40% were observed. The results indicate that this new area of research has the potential of achieving worthwhile execution time reductions for real-time code.